1.2.2 In-System Diagnostic and Debug Capabilities

The Axcelerator family of FPGAs includes internal probe circuitry, allowing the designer to dynamically observe and analyze any signal inside the FPGA without disturbing normal device operation (see the following figure).

Figure 1-9. Probe Setup

Up to four individual signals can be brought out to dedicated probe pins (PRA/B/C/D) on the device. The probe circuitry is accessed and controlled through Silicon Explorer II, Microchip's integrated verification and logic analysis tool that attaches to the serial port of a PC and communicates with the FPGA through the JTAG port. For more information, see Silicon Explorer II Probe Interface.