2.9.3.1 Reference Clock

The RefCLK can be driven by the following:

Global routed clocks (CLKE/F/G/H) or user-created clock network
CLK1 output of an adjacent PLL
[H]CLKxP (single-ended or voltage-referenced)
[H]CLKxP/[H]CLKxN pair (differential modes like LVPECL or LVDS)

Figure 2-51. Reference Clock Connections

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