54.1 Revision History

Revision L - 01/2025

The following updates were added in this revision of the document.


Section	Updates
Ordering Information	Updated the figure to include the reference for OTP and added a note regarding where to find OTP information.

Revision K - 08/2023

The following updates were added in this revision of the document.


Section	Updates
Peripheral Access Controller	Updated reset value of DSU Bit in STATUSB Register. Updated reset value in INTFLAGAHB, INTFLAGA, INTFLAGB, INTFLAGC, INTFLAGD, STATUSA, STATUSB, STATUSC and STATUSD Registers.
Clock System	Updated Figure 15-1.
PM - Power Manager	Updated the table of VREGSMOD Bits in STDBYCFG Register.
OSCCTRL - Oscillators Controller	Updated Figure 20-2. Added note in CLKFAIL Bit in STATUS Register.
OSC32KCTRL - 32.768 kHz Oscillators Controller	Added the fifth paragraph in 32.768 kHz Internal Oscillator (OSC32K) Operation.
RTC - Real-Time Counter	Updated Property field in COUNT Register.
DMAC - Direct Memory Access Controller	Changed CLK_DMAC_APB by CLK_DMAC_AHB in Clocks. Changed (BEATSIZE + 1) by (BEATSIZE) in Addressing.
Nonvolatile Memory Controller (NVMCTRL)	Updated second paragraph in Memory Organization. Updated the table of PSZ Bits in PARAM Register.
Event System (EVSYS)	Updated User Multiplexer Number Table with info of Users m=45 and m=46. Added note 1.
SERCOM USART - SERCOM Synchronous and Asynchronous Receiver and Transmitter	Updated second paragraph in Data Transmission. Added note in LIN Host. Added note in Sample Adjustment. Added note in HDRDLY and BRKLEN Bits in CTRLC Register.
SERCOM SPI – SERCOM Serial Peripheral Interface	Updated first paragraph in Hardware Controlled SS. Added note in MSSEN Bit in CTRLB Register.
CAN - Control Area Network (SAM C21 Only)	Changed CLK_CANx_APB by CLK_CANx_AHB in Sleep Mode Operation and Synchronization. Changed CLK_CAN_APB by CLK_CAN_AHB in CCCR Register, Standard Message ID Filter Element and Extended Message ID Filter Element. Updated description in NBTP Register.
Timer/Counter (TC)	Added the fourth note in Capture Operations. Updated Property field and added note in CAPTMODE1, CAPTMODE0, COPENx, CAPTENx, ALOCK, PRESCALER, ONDEMAND, RUNSTDBY, PRESCSYNC, MODE, ENABLE and SWRST Bits in CTRLA Register. Added info of PER Bit in SYNCBUSY Register.
Timer/Counter for Control Applications (TCC)	Updated Property field and added note in CPTENx, DMAOS, MSYNC, ALOCK, PRESCYNC, RUNSTDBY, PRESCALER, RESOLUTION, ENABLE and SWRST Bits in CTRLA Register. Updated Property field and added note in CTRLBCLR, STATUS, COUNT, CCx, and WAVEBUF Registers. Added note in CTRLBSET and PER Registers. Updated info of PGVx and PGEx Bits and added note in PATT Register. Updated info of SWAPx, POLx and CICCENx Bits and added note in SWAPx, POLx, CICCENx, CIPEREN, RAMP and WAVEGEN Bits in WAVE Register. Updated Property field, added note and updated info of PGVBx and PGEBx Bits in PATTBUF Register. Updated Property field, added note and updated info of PERBUF and DITHERBUF Bits in PERBUF Register. Updated Name, Offset and Property fields, added note and updated info of DITHERBUF Bits in CCBUFx Register.
ADC - Analog-to-Digital Converter	Removed an erroneous reference to DAC in Features, Figure 38-1 and Figure 38-8. Updated second paragraph in Operation. Updated Conversion Timing and Sampling Rate with new information after Figure 38-6. Updated table of MUXPOS Bits in INPUTCTRL Register.
AC - Analog Comparators	Added note in Offset Compensation. Updated table of MUXPOS and MUXNEG Bits in COMPCTRL Register.
DAC – Digital-to-Analog Converter (SAM C21 only)	Updated second paragraph in Principle of Operation. Updated second bullet in Interrupts.
Electrical Characteristics 85°C (SAM C20/C21 E/G/J)	Updated Min. and Max. Values of V_PIN in Table 45-1. Updated Max. Values of IDLE2 in Table 45-11. Deleted note 2. Updated T_S in Table 45-22. Updated f_OUT in Table 45-52 and added note 3. Updated Table 45-57. Added note 5. Updated Typ. and Max. Values of I_DD in Table 45-58.
Electrical Characteristics 105°C (SAM C20/C21 E/G/J)	Updated Max. Values of IDLE2 in Table 46-2. Deleted note 2. Updated Min. Value of Cyc_EEPROM in Table 46-12. Updated Typ. and Max. Values of I_DD in Table 46-20.
Electrical Characteristics 105°C (SAM C20/C21 N)	Updated Typ. and Max. Values of I_DD in Table 47-25.
Electrical Characteristics AEC - Q100 Grade 1, 125°C (SAM C20/C21 E/G/J)	Updated Typ. and Max. Values of I_DD in Table 48-33.
Schematic Checklist	Added second paragraph in Introduction. Added second paragraph in Operation in Noisy Environment. Updated Figure 53-5 and added note in External Reset Circuit. Updated Figure 53-12 and Table 53-7. Updated Figure 53-13, deleted note and added new note after Table 53-8. Updated Figure 53-14, deleted note and added new note after Table 53-9. Updated Figure 53-15 and added new note after Table 53-10.

Revision J - 12/2021

The following updates were added in this revision of the document.


Section	Updates
Features	Added new 64 MHz information
Configuration Summary	Added new 64 MHz information and new notes to the tables.
Ordering Information	Added information related to the new 64 MHz packages.
Block Diagram	Updated the Processor section of the Diagram to denote both 48 MHz and 64 MHz parts.
PM - Power Manager	Updated the table in Regulator Automatic Low Power Mode with a new note.
SUPC - Supply Controller	Updated Enabling, Disabling, and Resetting with new text Updated the VREG Register with new information for the ENABLE bit
DMAC - Direct Memory Access Controller	Updated Addressing with a new Register name.
PORT - I/O Pin Controller	Updated the Overview of the PORT Block Diagram in the Functional Description Added a new note to Events
EVSYS - Event System	Added the CHANNELn.PATH column to the table in Sleep Mode Operation.
CAN - Controller Area Network	Updated the TSCV Register to properly display the TSC bitfield.
ADC - Analog-to-Digital Controller	Removed an erroneous reference to OPAMP from Features.
Electrical Characteristics at 85°C (SAM C20/C21 E/G/J)	Updated the tables in Maximum Clock Frequencies to account for new information on 64 MHz devices Updated Power Consumption with new 64 MHz information and a new table Updated NVM Characteristics with 64 MHz information for table 45-38 Updated Digital Phase Locked Loop (DPLL) Characteristics with new 64 MHz information Updated the table and notes for table 45-54 in 48 MHz RC Oscillator (OSC48M) Characteristics
Electrical Characteristics at 105°C (SAM C20/C21 E/G/J)	Updated table 46-2 with new data for IDLE2 in Power Consumption Updated table 46-19 with new information and new notes in 48 MHz RC Oscillator (OSC48M) Characteristics
Electrical Characteristics AEC-Q100 Grade 1, 125°C (SAM C20/C21 E/G/J)	Updated table 48-32 with new information and notes in 48 MHz RC Oscillator (OSC48M) Characteristics.
Packaging Information	Added a new note applicable to the QFN packages with an exposed die to Package Drawings.
Schematic Checklist	Updated the figures in: Power Supply Connections External Reset Circuit Programming and Debug Ports Cortex Debug Connector (10-pin) 10-pin JTAGICE3 Compatible Serial Wire Debug Interface 20-pin IDC JTAG Connector

Revision H - 09/2021

The following updates were added in this revision of the document.


Section	Updates
General	The SPI and I²C standards use the terminology "Master" and "Slave". The equivalent Microchip terminology, "Host" and "Client," is used in this document. This terminology has been updated throughout this document for this revision.
Features	Added new bulleted items for the PWM under Peripherals.
Configuration Summary	Updated the TC and Waveform PWM entries in the following tables: C21 Family Features C20 Family Features
Signal Descriptions List	Updated the TC and TCC entries with new verbiage for waveform/PWM outputs
Power Supply and Start-Up Considerations	Updated the title of Power-Up Sequence to Power-Up Sequence - Maximum Rise Rate, and consolidated the text.
Processor and Architecture	Removed Erroneous PM-Power Manager mentions in the Interrupt Line Mapping tables.
MCLK	Removed incorrect CLKCFG text from Clock Ready Flag Updated the INTFLAG Register changing CLKCFG to CPUDIV
SUPC	Added new text to the bit description for the BODVDDRDY bitfield in the STATUS register.
EVSYS	Updated the Event Generators table in the CHANNELn Register Updated the User Multiplexer Number table in the USERm Register
SERCOM - USART	Removed erroneous text from I/O Lines.
SERCOM - SPI	Removed erroneous text from I/O Lines Updated the text for the DOPO bitfield in the CTRLA Register
SERCOM I²C	Updated the verbiage in the DRDY bitfield for the INTFLAG Register.
TCC	Updated the Register Offset equation for the CCx Register.
CCL	Updated the Linked Lut Input Selection figure in Truth Table Inputs Selection with a new image.
ADC	Updated the equation for the SAMPLEN bitfield in the SAMPCTRL Register.
Electrical Characteristics at 85°C	Updated the POR Operating Principle image in POR - Power ON Reset Characteristics Updated the images BODVDD Hysteresis OFF and BODVDD Hysteresis ON in BODVDD - Brown Out Detector Characteristics Updated the Differential Mode, and Single-Ended Mode tables with new Conditions for the TUE Parameter in Analog-to-Digital Converter (ADC) Characteristics Removed erroneous SS line from the SPI Timing Requirements in Host Mode figure in SERCOM in SPI Mode Timing
Electrical Characteristics at 105°C (SAM C20/C21 N)	Updated the Differential Mode, and Single-Ended Mode tables with new Conditions for the TUE Parameter in Analog-to-Digital Converter (ADC) Characteristics Updated the images BODVDD Hysteresis OFF and BODVDD Hysteresis ON in BODVDD - Brown Out Detector Characteristics
Electrical Characteristics AEC - Q100 Grade 1, 125°C (SAM C20/C21 E/G/J)	Updated the Differential Mode, and Single-Ended Mode tables with new Conditions for the TUE Parameter in Analog-to-Digital Converter (ADC) Characteristics.
Electrical Characteristics AEC - Q100 Grade 1, 125°C (SAM C20/C21 N)	Updated the Differential Mode, and Single-Ended Mode tables with new Conditions for the TUE Parameter in Analog-to-Digital Converter (ADC) Characteristics Updated the images BODVDD Hysteresis OFF and BODVDD Hysteresis ON in BODVDD - Brown Out Detector Characteristics
Appendix A	Updated the Ordering Information with all new tables.
Packaging Information	Updated the note in the following packages: 64-Pin VQFN 48-Pin VQFN
Schematic Checklist	Updated External Reset Circuit with new images and a new note.

Revision G - 11/2020

The following updates were added in this revision of the document.


Section	Updates
Configuration Summary	Updated the number of ADC channels for the SAM C21 in the SAM C21 Family Features table.
Processor and Architecture	The bit address and reset value in SRAM Quality of Service.
DSU	Updated Testing of On-Board Memories MBIST with new test actions in the MBIST Operation Phases table.
Clock System	Updated the Clock Request Routing image in On-demand, Clock Requests.
GCLK	Updated the CHEN bit of the PCHCTRLm Register with a new verbiage.
MCLK	Updated Peripheral Clock Masking topic with the removal of the table Updated the APBCMASK Register with a new R/W property for the DAC bit
OSC32KCTRL	Updated the XOSC32K register with a new verbiage for the STARTUP bit
RTC	Updated the following registers with new notes: FREQCORR COUNT (COUNT32 Mode) COMP (COUNT32 Mode) COUNT (COUNT16 Mode) PER (COUNT16 Mode) COMPn (COUNT16 Mode) CLOCK (Clock/Calendar Mode) ALARM (Clock/Calendar Mode) MASK (Clock/Calendar Mode)
DMAC	Updated the DESCADDR Register with 64 as the new number of bits for alignment in the DECADDR bit.
NVMCTRL	Updated the ADDR Register with a new verbiage and added an example Updated the LOCK Register with a new Register reset value, and a new verbiage for the LOCK bit
EVSYS	Updated Features with a new text for the last bulleted item Updated the table in the CHANNEL bit of the USERm register
SERCOM I²C	Updated the Signal Description with a new cross reference.
CAN	Updated the RF1L bit verbiage in the RXF1S Register.
TC	Updated the following topics with additions to the titles, a new note, and image updates: Capture Operations Event and I/O pin Capture Action Period and Pulse-Width (PPW) Capture Action on Events Pulse-Width Capture Action on Events Time-Stamp Capture on Event or pin Updated the following registers with a new verbiage: CTRLBCLR with updates to the LUPD bit CTRLBSET with updated to the LUPD bit
TCC	Updated the CTRLA Register with the addition of the DMAOS bit.
CCL	Updated this chapter with the following items: Clarified the 4 programmable Lookup Tables in Features Added a new Block Diagram Updated the Signal Description with new Pin names in the table
AC	Updated the COMPCTRL Register with new Descriptions in the tables for the MUXPOS and MUXNEG bits
Electrical Characteristics 85°C (SAM C20/C21 E/G/J)	Updated the following Topics: I/O Pin Characteristics with the addition of verbiage for the RESET_N pin Updated the Diagrams in BODVDD - Brown Out Detector Characteristics Updated Analog-to-Digital Converter (ADC) Characteristics by removing an erroneous equation segment. Updated table formatting to better display the tables within this chapter. Updated the table formatting in Digital to Analog Converter (DAC) Characteristics to better display the information Updated the table formatting and verbiage in Voltage Reference Characteristics
Electrical Characteristics 105°C (SAM C20/C21 E/G/J)	Updated the following Topics: Updated the Diagrams in BODVDD - Brown Out Detector Characteristics
Electrical Characteristics 105°C (SAM C20/C21 N)	Updated the following Topics: Updated the Diagrams in BODVDD - Brown Out Detector Characteristics Updated Analog-to-Digital Converter (ADC) Characteristics by removing an erroneous equation segment. Updated table formatting to better display the tables within this chapter. Updated the table formatting in Digital to Analog Converter (DAC) Characteristics to better display the information Updated the table formatting and verbiage in Voltage Reference Characteristics
Electrical Characteristics AEC - Q100 Grade 1, 125°C (SAM C20/C21E/G/J)	Updated the following Topics: I/O Pin Characteristics with the addition of verbiage for the RESET_N pin Updated the table formatting in Digital to Analog Converter (DAC) Characteristics to better display the information Updated the table formatting and verbiage in Voltage Reference Characteristics
Electrical Characteristics AEC - Q100 Grade 1, 125°C (SAM C20/C21N)	Updated the following Topics: Updated the Diagrams in BODVDD - Brown Out Detector Characteristics Updated Analog-to-Digital Converter (ADC) Characteristics with new table formatting to better display the tables within this chapter
Appendix A	Added a new appendix for ISELED parts specification and ordering information.
Appendix B	Added a new Appendix for SIL 2 Enabled Functional Safety Devices.

Revision F - 09/2020

This revision included numerous typographical updates throughout the document.


Section	Updates
General	Typical Powering Schematics removed from Power Supply and Startup Considerations chapter. It now refers to the Schematic Checklist chapter. OSCCTRL XOSCCTRL.GAIN value 0x4 updated to ‘max 32MHz recommended frequency’ SERCOM baud rate equations in table 30-2: added asynchronous fractional mode SERCOM SPI CTRLA.DOPO description updated ADC bit field names in NVM Software Calibration Area Mapping table 9-5 Addition of IDLE0 and IDLE2 modes in PM SLEEPCFG register SDADC REFCTRL.REFRANGE bit field removed DMAC SRCADDR and DSTADDR description update NVMCTRL LOCK register default state after erase updated to 0xFFFF CAN Sleep Mode Operation updated with regards to IDLE0 and IDLE2 modes CAN CCCR.NISO bit added CAN IR.TC bit field description updated TC PER register added for 8-bit mode TCC EVCRTL.EVACT value 0x6 added as STAMP CCL: added a note about TCC2 outputs CCL LUTCTRLn.INSELx value 0x8 added for TCC
Electrical Characteristics 85℃ (SAM C20/C21 E/G/J)	AC Characteristics table note 4 completed General Operating rating note updated : I/O in VDDIO clusters can be multiplexed as analog inputs and outputs. SDADC Operating Conditions table updated ADC Csample typical value removed, max value updated 4.5pF => 3.2pF
Electrical Characteristics 105°C (SAM C20/C21 E/G/J)	Added new section PTC Characteristics
Electrical Characteristics 105°C (SAM C20/C21 N)	Added new section PTC Characteristics AC Characteristics table note 4 added IDLE0 current consumption at 105℃ updated in Power Consumption ADC Operating Conditions table updated and note 2 added ADC Csample typical value removed, max value updated 4.5pF => 3.2pF SDADC Operating Conditions table updated
Electrical Characteristics AEC - Q100 Grade 1. 125℃ (SAM C20/C21 E/G/J)	Updated the PTC Power Consumption tables with new values. Updated the Current Consumption table with new IDLE0 Current Consumption at 125℃ in Power Consumption
Electrical Characteristics AEC - Q100 Grade 1, 125°C (SAM C20/C21 N)	Added new Sensor Load Capacitance table to PTC Characteristics.
Packaging Information	Removed references to moisture sensitivity for each package Updated the Package Drawings to the latest version

Revision E - 06/2020

This revision included numerous typographical updates throughout the document.


Ordering Information	Updated the diagram and notes to display AEC - Q100 nomenclature.
SAM C20/C21 N AEC - Q100 Electrical Characteristics	New electrical specifications chapter added.
General	Updated all references in the document to AEC - Q100 to match industry naming conventions Updated the device name throughout the document to SAM C20/C21

Revision D - 01/2020


Configuration Summary	Updated Table 1-3 SAM C21 Family Features with new values for the PTC Updated Table 1-4 SAM C20 Family Features with new values for the AC
Block Diagram	Updated the arrow to bridge between PORT and AHB-APB Bridge B.
Signal Descriptions	Updated Table 5-1 Signal Descriptions List - SAM C20/C21 with small typographical edits for VOUT and VREFA.
Multiplexed Signals	Updated Table 6-1, Table 6-2, Table 6-3, and Table 6-4 with new ADC-DAC/VREFA values in the REF column.
Processor and Architecture	Updated Table 10-3 and 10-4 in Interrupt Line Mapping with notations designating which chip the Peripheral Source applies to.
GCLK	Updated Figure 16-1 Block Diagram to correct missing information Updated the GENCTRL bit for the SYNCBUSY register
MCLK	Updated the AHBMASK Register to display the DIVAS and APBD bits Updated the TC4 bit of the APBCMASK Register to display the Description table Updated the APBDMASK Register with a new note on availability of features for SAMC2x “N” Series devices
PM	Updated the SLEEPMODE bit of the SLEEPCFG Register with new data in the table.
OSCCTRL	Updated the AMPGC bit of the XOSCCTRL Register with a new note.
SUPC	Updated Voltage Reference System Operation with new text referencing the INTREF Updated Selecting a Voltage Reference with new text for the INTREF Updated the ACTCFG bit of the BODVDD Register to remove an erroneous reference to Sleep Mode Updated the STDBYCFG bit of the BODVDD Register with new table values
EIC	Updated Initialization with new information for line 6 Updated Interrupt Pin Debouncing with new text designating the availability of features for SAM C20/C21 N Variants Updated the DEBOUNCEN Register with a new note Updated the DPRESCALER Register with a new note Updated the PINSTATE Register with a new note
NVMCTRL	Updated the LOCK Register with new reset values.
PORT I/O Pin Controller	Corrected typographical error in OUTTGL reference in Features.
CAN	Updated Power Management with new interrupt text Updated Sleep Mode Operation with new introductory sentence
CCL	Updated Truth Table Inputs Selection for Internal Events Inputs Selection (EVENT) with C20/C21 availability text Updated the table for the INSELx bit in the LUTCTRLn Register
ADC	Updated Overview with supporting text for the INTREF voltage reference Updated Features with new supporting text for INTREF Updated Analog Connections with new supporting text for INTREF Updated Reference Configuration with new supporting text for INTREF Updated the REFSEL bit for the REFCTRL Register Updated the MUXPOS bit for the INPUTCTRL Register
SDADC	Removed erroneous information from Features for Conversion Range Updated the REFSEL bit for the REFCTRL Register
AC	Updated the Overview with information for CMP2 and CMP3 on E and G variants Updated Features with information on the INTREF Updated the Block Diagrams to replace Bandgap with INTREF Updated Analog Connections to replace Bandgap text with INTREF Updated Principle of Operation to replace Bandgap text with INTREF Updated the table for the MUXNEG bit of the COMPCTRL Register
DAC	Updated Analog Connections to replace Bandgap text with INTREF Updated the table for the REFSEL bit for the CTRLB Register
FREQM	Added a new note to the Block Diagram Updated the DIVREF bit description for the CFGA Register
Electrical Characteristics at 85°C	Updated Table 45-18 Decoupling Requirements in Voltage Regulator Characteristics with new values and a new note Updated Table 45-19 Operating Conditions in Analog-to-Digital Converter (ADC) Characteristics with INTREF replacing Bandgap Updated Table 45-23 Operating Conditions in Sigma-Delta Analog-to-Digital Converter (SDADC) Characteristics with the addition of a note and the removal of single-ended mode references Updated Crystal Oscillator Characteristics with a new equation and removed C_SHUNTfrom the diagram
Electrical Characteristics at 105°C	Updated Table 47-8 Operating Conditions in Sigma-Delta Analog-to-Digital Converter (SDADC) Characteristics to remove the Single-ended mode reference and added new note.
AEC Q100 Grade 1, Electrical Characteristics at 125°C	Updated Table 48-3 Current Consumption with new values for the Maximum under Standby.
Schematic Checklist	Removed pF references from Figure 50-7 Crystal Oscillator Schematic and removed pF references from Table 50-5 in Crystal Oscillator

Revision C - 01/2019


Ordering Information	Added a note to clarify SAM C2xN availability in 105°C Introduced AEC - Q100 Grade 1 qualified silicon revision F Clarified availability of factory programmed Bootloader for WLCSP
PAC	Added missing CAN1 bit field to INTFLAGC register Corrected a typographical error for PTC bit field in INTFLAGC & STATUSC register Corrected a typographical error for RSTC bit field in STATUSA register
OSC32KCTRL	RTCCTRL register was missing, and same has been added in this version
I/O Multiplexing and Considerations	Corrected a typographical error for SERCOM4 and SERCOM5 in Table 6-2
RTC	Register (EVCTRL, INTENCLR, INTENSET, INTFLAG, SYNCBUSY) summary typographical error was addressed FREQCORR, DBGCTRL registers were missing in register summary, added in this version
SUPC	Clarified the ENABLE bit in section 22.8.6 Voltage Regulator System (VREG) Control Corrected typo for Reset value of the Voltage Regulator System (VREG) Control register in the section 22.8.6
SERCOM-USART	Clarified Auto baud detection mode for LIN Slave in CTRLA register
TCC	Corrected a typo in the Register summary - 32-bit mode for the PER & PERBUF registers has been removed
ADC	Updated section 38.6.2.3 Operation Updated section 38.6.5 Interrupts
Electrical Characteristics at 85°C	Typographical errors in the Electrical specification chapter addressed Table 45-32. Power Consumption Clarified SPI maximum speed information in Table 45-56 ADC , SD ADC, and AC Electrical Characteristics for silicon revision F added
Electrical Characteristics at 105°C	Updated AC Table 46-8. Power Consumption
AEC-Q100 Grade 1, 125°C Electrical Characteristics	New chapter of electrical specifications for AEC - Q100 Grade qualified device.
Packaging	Top marking legend information added for all packages

Revision B - 06/2017


General	The SAM C20 Family Data Sheet (DS60001480A) was combined with this data sheet to create this version The Errata chapter was removed. This content is now provided in a separate document.

Revision A - 03/2017


General Updates	Updated the document from Atmel to Microchip style and template The literature number changed from the Atmel 42365 to the Microchip DS60001479A The Data Sheet revision letter was restarted to A An ISBN number was added
Ordering Information	Removed space form the ordering codes.
Introducing SAM C20/C21N	100-pin TQFP package option. More features: Eight TCs, eight SERCOMs
EIC – External Interrupt Controller	Added interrupt pin debouncing for SAM C20/C21N.
Configurable Custom Logic (CCL)	LUTCTRLn.INSELx: Added ALT2TC at INSELx=0xA. For the ALT2TC options the LUT 0 to 3 mapping will be TC4,TC5,TC6,TC7. The ALT2TC is only applicable for SAM C20/C21N.
OSC32KCTRL – 32.768 kHz Oscillators Controller	XOSC32K.STARTUP[2:0]: Table for start-up times updated.
CAN - Control Area Network (SAM C21 Only)	Updated block diagram. The CAN cannot operate in Standby sleep mode: Merged content from "Power Down (Sleep Mode)" section into Sleep Mode Operation. Updated description of Power Management . MRCFG.RUNSTDBY bit removed.
Electrical Characteristics 85°C (SAM C20/C21 E/G/J)	Digital-to-Analog Converter (DAC) Characteristics: Updated conditions and typical numbers for power consumption. Digital Phase Locked Loop (DPLL) Characteristics: Added typical characterization numbers. 48 MHz RC Oscillator (OSC48M) Characteristics: Updated T_START values, updated note 4 and removed the condition.
Electrical Characteristics 105°C (SAM C20/C21 E/G/J)	Digital-to-Analog Converter (DAC) Characteristics: Updated conditions and typical numbers for power consumption. Digital Phase Locked Loop (DPLL) Characteristics: Added typical characterization numbers. 48 MHz RC Oscillator (OSC48M) Characteristics: Updated T_START values, updated note 4 and removed the condition.
Electrical Characteristics 105°C (SAM C20/C21 N)	Electrical characterization data added for SAM C20/C21.
Schematic Checklist	External Reset Circuit: Updated schematic diagram and recommended pin connections.