1.3.1 Increased Maximum Input Leakage Current Specification on 8-bit Digital-to-Analog Converter (DAC) VREF- Pins

The 8-bit DAC VREF- pins on this device have a higher sensitivity to ESD than other I/O pins. An ESD event may result in higher Leakage Current than specified (Parameter D340 in the device data sheet). This increased maximum Input Leakage Current is only applicable to the 8-bit DAC VREF- pins. It is recommended that the increased ESD sensitivity on these pins be taken into consideration during design.

The table below shows the updated Input Leakage Current electrical specification on these pins:

Table 1-1. IO PORTS
Standard Operating Conditions (unless otherwise stated)
Param. No.Sym.Device CharacteristicsMin.Typ.†Max.UnitsConditions
Input Leakage Current(1)
D340IILI/O PORTS—±5±125nAVSS ≤ VPIN ≤ VDD,

Pin at high-impedance, 85°C

I/O PORTS (for 8-bit DAC VREF- pins)—± 5± 2000nA

VSS ≤ VPIN ≤ VDD, Pin at high-impedance, 85°C

D341I/O PORTS—±5±1000nAVSS ≤ VPIN ≤ VDD,

Pin at high-impedance, 125°C

I/O PORTS (for 8-bit DAC VREF- pins)—± 5± 2000nAVSS ≤ VPIN ≤ VDD,

Pin at high-impedance, 125°C

D342MCLR(2)—±50±200nAVSS ≤ VPIN ≤ VDD,

Pin at high-impedance, 85°C

† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note:
  1. Negative current is defined as current sourced by the pin.
  2. The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions. Higher leakage current may be measured at different input voltages.

Work around

None.

Affected Silicon Revisions

A1A2A3
X