9.7.4 STATUS
Note: 
            
- For
                     Borrow, the polarity is reversed. A subtraction is
                  executed by adding the two’s complement of the second operand. For Rotate
                     (RRCF,RLCF) instructions, this bit is loaded with either the high or low-order bit of the Source register.
| Name: | STATUS | 
| Offset: | 0x0003 | 
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| TO | PD | Z | DC | C | |||||
| Access | R | R | R/W | R/W | R/W | ||||
| Reset | 1 | 1 | 0 | 0 | 0 | 
Bit 4 – TO Time-Out
| Reset States: | 
 | 
| Value | Description | 
|---|---|
| 1 | Set at
                  power-up or by execution of CLRWDTorSLEEPinstruction | 
| 0 | A WDT time-out occurred | 
Bit 3 – PD Power-Down
| Reset States: | 
 | 
| Value | Description | 
|---|---|
| 1 | Set at
                  power-up or by execution of CLRWDTinstruction | 
| 0 | Cleared by
                  execution of the SLEEPinstruction | 
Bit 2 – Z Zero
| Reset States: | 
 | 
| Value | Description | 
|---|---|
| 1 | The result of an arithmetic or logic operation is zero | 
| 0 | The result of an arithmetic or logic operation is not zero | 
Bit 1 – DC Digit Carry/Borrow(1)
ADDWF, ADDLW, SUBLW,
               SUBWF instructions| Reset States: | 
 | 
| Value | Description | 
|---|---|
| 1 | A carry-out from the 4th low-order bit of the result occurred | 
| 0 | No carry-out from the 4th low-order bit of the result | 
Bit 0 – C Carry/Borrow(1)
ADDWF,
               ADDLW, SUBLW, SUBWF
            instructions| Reset States: | 
 | 
| Value | Description | 
|---|---|
| 1 | A carry-out from the Most Significant bit of the result occurred | 
| 0 | No carry-out from the Most Significant bit of the result occurred | 
