11.13.23 PIR5

Peripheral Interrupt Request Register 5

Note:

Interrupt flag bits get set when an interrupt condition occurs, regardless of the state of its corresponding enable bit or the global enable bit. User software must ensure the appropriate interrupt flag bits are clear prior to enabling an interrupt.
PWM2IF is a read-only bit. To clear the interrupt condition, all bits in the PWM2GIR register must be cleared.

Name:	PIR5
Address:	0x4B7


Bit	7	6	5	4	3	2	1	0
	PWM2IF	PWM2PIF	CLC2IF	CM2IF		TU16AIF	CLC6IF
Access	R	R/W/HS	R/W/HS	R/W/HS		R	R/W/HS
Reset	0	0	0	0		0	0

Bit 7 – PWM2IF PWM2 Parameter Interrupt Flag⁽²⁾

Value	Description
1	Interrupt has occurred
0	Interrupt event has not occurred

Bit 6 – PWM2PIF PWM2 Period Interrupt Flag

Value	Description
1	Interrupt has occurred (must be cleared by software)
0	Interrupt event has not occurred

Bit 5 – CLC2IF CLC2 Interrupt Flag

Value	Description
1	Interrupt has occurred (must be cleared by software)
0	Interrupt event has not occurred

Bit 4 – CM2IF CMP2 Interrupt Flag

Value	Description
1	Interrupt has occurred (must be cleared by software)
0	Interrupt event has not occurred

Bit 2 – TU16AIF 16-bit Universal Timer A Interrupt Flag

Value	Description
1	Interrupt has occurred (must be cleared by software)
0	Interrupt event has not occurred

Bit 1 – CLC6IF CLC6 Interrupt Flag

Value	Description
1	Interrupt has occurred (must be cleared by software)
0	Interrupt event has not occurred

Interrupt flag bits get set when an interrupt condition occurs, regardless of the state of its corresponding enable bit or the global enable bit. User software must ensure the appropriate interrupt flag bits are clear prior to enabling an interrupt. PWM2IF is a read-only bit. To clear the interrupt condition, all bits in the PWM2GIR register must be cleared.