21.2 Embedded Characteristics

  • Up to 88 Programmable I/O Lines
  • Multiplexing of Up to 4 Peripheral Functions per I/O Line
  • For Each I/O Line (whether assigned to a peripheral or used as general purpose I/O):
    • Input change interrupt
    • Programmable glitch filter
    • Programmable debouncing filter
    • Multi-drive option enables driving in open drain
    • Programmable pull-up/pull-down
    • Pin data status register, supplies visibility of the level on the pin at any time
    • Programmable event: rising edge, falling edge, both edges, low-level or high-level
    • Configuration lock by the connected peripheral
    • Privileged-Access or User-Access mode management
    • Programmable configuration lock (active until next VDDCORE reset) to protect against further software modifications (intentional or unintentional)
  • Separate Interrupt Lines: One Group Driven by Privileged Access I/O and the Second Group Driven by User Access I/O
  • Register Write Protection against Unintentional Software Modifications:
    • One configuration bit to enable or disable protection of I/O line settings
    • One configuration bit to enable or disable protection of interrupt settings
  • Synchronous Output, Possibility to Set or Clear Simultaneously Up to 32 I/O Lines in a Single Write
  • Programmable Schmitt Trigger Inputs
  • Programmable Slew Rate