20.1.2 Signal Routing Port Input

The input to the Signal Routing Port is selected using the PORTWINx registers. There is a separate PORTWINx register for each pin of the Signal Routing Port. Several core independent peripherals are available as input selections to the multiplexer as shown in the PORTWINx Input Selections table below. In addition to the core independent peripherals, the following inputs are also added to each multiplexer:

  • The corresponding LATWn register bit – allows for software writes to the Signal Routing pin.
  • Input from the immediate next Signal Routing pin RW[n+1] – allows for shift register operation.
  • An external I/O pin – allows physical inputs.
As previously mentioned, one of the input selections available to the PORTWINx register is the LATWn register bit. The LATW register allows the user to write a value to the Signal Routing Port from software. Unlike a typical I/O port, LATW is a separate register from the actual data register as shown in Figure 20-1 block diagram.
Important:
  1. To perform a software write to one of the Signal Routing pins using the LATW register, the PORTWINx register for that Signal Routing pin must select the corresponding LATWn bit as input to the Signal Routing Port.
  2. Reading the LATW register returns the most recently written value to the LATW register and not the actual input to the Signal Routing Port. The actual input to the Signal Routing Port is selected using PORTWINx register and can be read using the PORTW register. This is similar to the standard I/O pins read/write operations.

The following input selection multiplexers are available on this device:

Table 20-1. PORTWINx Input Selections
IN[3:0]PORTWIN0PORTWIN1PORTWIN2PORTWIN3PORTWIN4PORTWIN5PORTWIN6PORTWIN7
1111-1101ReservedReservedReservedReservedReservedReservedReservedReserved
1100TU16A_OUTTU16B_OUTTMR2_OUTTMR6_OUTTU16A_OUTTU16B_OUTTMR4_OUTTMR6_OUT
1011SPI2_SSSPI2_SDOSPI2_SCKSPI2_SSSPI2_SDOSPI2_SCKSPI2_SDOSPI2_SCK
1010CLKREF_OUTNCO1_OUTCLKREF_OUTNCO1_OUTCLKREF_OUTNCO1_OUTCLKREF_OUTNCO1_OUT
1001HLVD_OUTZCD1_OUTHLVD_OUTZCD2_OUTHLVD_OUTZCD1_OUTHLVD_OUTZCD2_OUT
1000CLC1_OUTCLC2_OUTCLC3_OUTCLC4_OUTCLC5_OUTCLC6_OUTCLC7_OUTCLC8_OUT
0111CCP1_OUTPWM1S1P1_OUTPWM2S1P1_OUTPWM3S1P1_OUTCCP2_OUTPWM1S1P2_OUTPWM2S1P2_OUTPWM3S1P2_OUT
0110CMP1_OUTCMP2_OUTCMP1_OUTCMP2_OUTCMP1_OUTCMP2_OUTCMP1_OUTCMP2_OUT
0101SPI1_SSSPI1_SDOSPI1_SCKSPI1_SSSPI1_SDOSPI1_SCKSPI1_SDOSPI1_SCK
0100TU16A_OUTTU16B_OUTTMR2_OUTTMR4_OUTTU16A_OUTTU16B_OUTTMR2_OUTTMR4_OUT
0011PORTWIN0PPSPORTWIN1PPSPORTWIN0PPSPORTWIN1PPSPORTWIN0PPSPORTWIN1PPSPORTWIN0PPSPORTWIN1PPS
0010RC0RC1RC2RC3RC4RC5RC6—
0001RW1RW2RW3RW4RW5RW6RW7RW0
0000LATW0LATW1LATW2LATW3LATW4LATW5LATW6LATW7