54.14.5 I²S Characteristics

Figure 54-19. Host Mode: SCK, FX, and MCK are Output

Figure 54-20. Client Mode: SCK and FS are Input

Table 54-63. I²S Timing Characteristics and Requirements (see Note 1)
Name	Description	Mode	VDD = 1.8V			VDD = 3.3V			Units
Name	Description	Mode	Min.	Typ.	Max.	Min.	Typ.	Max.	Units
t_{M_MCKOR}	I²S MCK rise time⁽²⁾	Host mode / Capacitive load CL = 20 pF	-	-	5.41	-	-	2.68	ns
t_{M_MCKOF}	I²S MCK fall time ⁽²⁾	Host mode / Capacitive load CL = 20 pF	-	-	5.84	-	-	2.81	ns
d_{M_MCKO}	I²S MCK duty cycle	Host mode	-	50.0	-	-	50.0	-	%
d_{M_MCKI}	I²S MCK duty cycle	Host mode, pin is input (1b)	-	50.0	-	-	50.0	-	%
t_{M_SCKOR}	I²S SCK rise time ⁽²⁾	Host mode / Capacitive load CL = 20 pF	-	-	5.06	-	-	2.51	ns
t_{M_SCKOF}	I²S SCK fall time ⁽²⁾	Host mode / Capacitive load CL = 20 pF	-	-	5.46	-	-	2.64	ns
d_{M_SCKO}	I²S SCK duty cycle	Host mode	-	50.0	-	-	50.0	-	%
f_{M_SCKO} 1/t_{M_SCKO}	I²S SCK frequency	Host mode Supposing external device response delay is 30ns	-	-	10.97	-	-	12.07	MHz
f_{S_SCKI} 1/t_{S_SCKI}	I²S SCK frequency	Client mode Supposing external device response delay is 30ns	-	-	15.63	-	-	15.87	MHz
d_{S_SCKO}	I²S SCK duty cycle	Client mode	-	50.0	-	-	50.0	-	%
t_{M_FSOV}	FS valid time	Host mode	-	-	5.4	-	-	4.2	ns
t_{M_FSOH}	FS hold time	Host mode	-0.3	-	-	-0.3	-	-	ns
t_{S_FSIS}	FS setup time	Client mode	7.8	-	-	7.5	-	-	ns
t_{S_FSIH}	FS hold time	Client mode	0.0	-	-	0.0	-	-	ns
t_{M_SDIS}	Data input setup time	Host mode	15.8	-	-	11.6	-	-	ns
t_{M_SDIH}	Data input hold time	Host mode	3.4	-	-	3.4	-	-	ns
t_{S_SDIS}	Data input setup time	Client mode	2.4	-	-	1.9	-	-	ns
t_{S_SDIH}	Data input hold time	Client mode	-1.1	-	-	-1.0	-	-	ns
t_{M_SDOV}	Data output valid time	Host transmitter	-	-	3.7	-	-	3.0	ns
t_{M_SDOH}	Data output hold time	Host transmitter	-0.5	-	-	-0.5	-	-	ns
t_{S_SDOV}	Data output valid time	Client transmitter	-	-	16.4	-	-	12.1	ns
t_{S_SDOH}	Data output hold time	Client transmitter	4.1	-	-	4.1	-	-	ns
t_PDM2LS	Data input setup time	Host mode PDM2 Left	15.8	-	-	11.6	-	-	ns
t_PDM2LH	Data input hold time	Host mode PDM2 Left	3.4	-	-	3.4	-	-	ns
t_PDM2RS	Data input setup time	Host mode PDM2 Right	15.1	-	-	11.6	-	-	ns
t_PDM2RH	Data input hold time	Host mode PDM2 Right	3.4	-	-	3.4	-	-	ns

: All timing values are given for 20 pF capacitive load.

Note:

These values are based on simulation. They are not covered by production test limits or characterization.
Refer to the section “I/O Pin Characteristics”.

54.14.5 I2S Characteristics

54.14.5 I²S Characteristics