11 Revision History

Revision C (September 2022)

Updated VFBGA and SOIC package drawings.

Revision B (June 2022)

Updated section content throughout for clarification. Added note to Table 4-6 that explains the array architecture and how endurance is specified. Updated Part Marking Information. Updated the SOIC, TSSOP and UDFN package drawings. Updated “master” and “slave” terminology with “host” and “client” respectively.

Revision A (August 2018)

Updated to the Microchip template. Microchip DS20006042 replaces Atmel document 8568. Corrected tLOW typo from 400 ns to 500 ns. Corrected tAA typo from 550 ns to 450 ns. Updated Part Marking Information. Updated the “Software Reset” section. Added ESD rating. Removed lead finish designation. Updated trace code format in package markings. Updated section content throughout for clarification. Added a figure for “System Configuration Using 2-Wire Serial EEPROMs”. Added POR recommendations section. Updated the SOIC, TSSOP and UDFN package drawings to Microchip format.

Atmel Document 8568 Revision F (January 2015)

Add the UDFN Expanded Quantity Option. Update 8X, 8MA2, and 8U2-1 package outline drawings, the ordering information section, and the disclaimer page.

Atmel Document 8568 Revision E (August 2012)

Update template and Atmel logo. Correct 8-lead UDFN to 8-pad UDFN. Update AC characteristics from μs to ns units and their respective values. Update part marking description.

Atmel Document 8568 Revision D (September 2011)

Atmel global device marking alignment. Update 8S1, 8A2 to 8X, 8MA2, and 8U2-1 package drawings.

Atmel Document 8568 Revision C (May 2010)

Update 8S1 and 8A2 package drawings.

Atmel Document 8568 Revision B (March 2010)

Part Markings and ordering detail/codes updated.

Atmel Document 8568 Revision A (September 2009)

Initial document release.