Processor cores can claim an interrupt by reading the PLIC's
Claim/Complete register (described in Interrupt Completion), which returns the ID of the
highest- priority pending interrupt or zero if there is no pending interrupt. A successful
claim will also atomically clear the corresponding pending bit on the interrupt source.
Processor cores can perform a claim at any time, even if the MEIP bit in the
mip register is not set. The claim operation is not affected by the
setting of the priority threshold register.