The Timer2/4/6 modules contain a Hardware Limit Timer (HLT) function that can be used to monitor activity on the RX and TX lines. The Timer2/4/6 module uses the Timer External Reset Signal Selection Register (TxRST) to reset the Timer when a user-selectable Reset event occurs. In this case, a value representing the desired time-out delay is loaded into the Timer Count Register (TxTMR). When a transition from an Idle state to an Active state on the TX output or RX input line will reset the Timer, indicating that the desired line (RX/TX) is active. If no transitions occur before the Timer expires, the HLT interrupt will occur, signaling a time-out event.