ISI_DMA_CHDR

DMA Channel Disable Register

  0x3C 32 Write-only –  
Parent topic: Register Summary

DMA Channel Disable Register

Bit  31 30 29 28 27 26 25 24  
                   
Access                   
Reset                   
Bit  23 22 21 20 19 18 17 16  
                   
Access                   
Reset                   
Bit  15 14 13 12 11 10 9 8  
                   
Access                   
Reset                   
Bit  7 6 5 4 3 2 1 0  
              C_CH_DIS P_CH_DIS  
Access              W W  
Reset              – –  

Bit 0 – P_CH_DIS: Preview Channel Disable Request

Preview Channel Disable Request

ValueDescription
0

No effect.
1

Disables the channel. Poll P_CH_S in DMA_CHSR to verify that the preview channel status has been successfully modified.

Bit 1 – C_CH_DIS: Codec Channel Disable Request

Codec Channel Disable Request

ValueDescription
0

No effect.
1

Disables the channel. Poll C_CH_S in DMA_CHSR to verify that the codec channel status has been successfully modified.