ISI_DMA_C_ADDR

DMA Codec Base Address Register

  0x50 32 Read/Write 0x00000000  
Parent topic: Register Summary

DMA Codec Base Address Register

Bit  31 30 29 28 27 26 25 24  
  C_ADDR[29:22]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 0 0  
Bit  23 22 21 20 19 18 17 16  
  C_ADDR[21:14]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 0 0  
Bit  15 14 13 12 11 10 9 8  
  C_ADDR[13:6]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 0 0  
Bit  7 6 5 4 3 2 1 0  
  C_ADDR[5:0]      
Access  R/W R/W R/W R/W R/W R/W      
Reset  0 0 0 0 0 0      

Bits 31:2 – C_ADDR[29:0]: Codec Image Base Address

Codec Image Base Address

This address is word-aligned.