EEFC_FSR

EEFC Flash Status Register

  0x08 32 Read-only  
Parent topic: Register Summary

EEFC Flash Status Register

Bit  31 30 29 28 27 26 25 24  
                   
Access                   
Reset                   
Bit  23 22 21 20 19 18 17 16  
          MECCEMSB UECCEMSB MECCELSB UECCELSB  
Access                   
Reset                   
Bit  15 14 13 12 11 10 9 8  
                   
Access                   
Reset                   
Bit  7 6 5 4 3 2 1 0  
          FLERR FLOCKE FCMDE FRDY  
Access                   
Reset                   

Bit 0 – FRDY: Flash Ready Status (cleared when Flash is busy)

Flash Ready Status (cleared when Flash is busy)

When set, this flag triggers an interrupt if the FRDY flag is set in EEFC_FMR.

This flag is automatically cleared when the EEFC is busy.

ValueDescription
0

The EEFC is busy.
1

The EEFC is ready to start a new command.

Bit 1 – FCMDE: Flash Command Error Status (cleared on read or by writing EEFC_FCR)

Flash Command Error Status (cleared on read or by writing EEFC_FCR)

ValueDescription
0

No invalid commands and no bad keywords were written in EEFC_FMR.
1

An invalid command and/or a bad keyword was/were written in EEFC_FMR.

Bit 2 – FLOCKE: Flash Lock Error Status (cleared on read)

Flash Lock Error Status (cleared on read)

This flag is automatically cleared when EEFC_FSR is read or EEFC_FCR is written.

ValueDescription
0

No programming/erase of at least one locked region has happened since the last read of EEFC_FSR.
1

Programming/erase of at least one locked region has happened since the last read of EEFC_FSR.

Bit 3 – FLERR: Flash Error Status (cleared when a programming operation starts)

Flash Error Status (cleared when a programming operation starts)

ValueDescription
0

No Flash memory error occurred at the end of programming (EraseVerify or WriteVerify test has passed).
1

A Flash memory error occurred at the end of programming (EraseVerify or WriteVerify test has failed).

Bit 16 – UECCELSB: Unique ECC Error on LSB Part of the Memory Flash Data Bus (cleared on read)

Unique ECC Error on LSB Part of the Memory Flash Data Bus (cleared on read)

ValueDescription
0

No unique error detected on 64 LSB data bus of the Flash memory since the last read of EEFC_FSR.
1

One unique error detected but corrected on 64 LSB data bus of the Flash memory since the last read of EEFC_FSR.

Bit 17 – MECCELSB: Multiple ECC Error on LSB Part of the Memory Flash Data Bus (cleared on read)

Multiple ECC Error on LSB Part of the Memory Flash Data Bus (cleared on read)

ValueDescription
0

No multiple error detected on 64 LSB part of the Flash memory data bus since the last read of EEFC_FSR.
1

Multiple errors detected and NOT corrected on 64 LSB part of the Flash memory data bus since the last read of EEFC_FSR.

Bit 18 – UECCEMSB: Unique ECC Error on MSB Part of the Memory Flash Data Bus (cleared on read)

Unique ECC Error on MSB Part of the Memory Flash Data Bus (cleared on read)

ValueDescription
0

No unique error detected on 64 MSB data bus of the Flash memory since the last read of EEFC_FSR.
1

One unique error detected but corrected on 64 MSB data bus of the Flash memory since the last read of EEFC_FSR.

Bit 19 – MECCEMSB: Multiple ECC Error on MSB Part of the Memory Flash Data Bus (cleared on read)

Multiple ECC Error on MSB Part of the Memory Flash Data Bus (cleared on read)

ValueDescription
0

No multiple error detected on 64 MSB part of the Flash memory data bus since the last read of EEFC_FSR.
1

Multiple errors detected and NOT corrected on 64 MSB part of the Flash memory data bus since the last read of EEFC_FSR.