Slave Node Synchronization

The synchronization is done only in slave node configuration. The procedure is based on time measurement between falling edges of the Synch Field. The falling edges are available in distances of 2, 4, 6 and 8 bit times.

Figure 1. Synch Field

The time measurement is made by a 19-bit counter clocked by the sampling clock (see “Baud Rate Generator”).

When the start bit of the Synch Field is detected, the counter is reset. Then during the next eight t_bit of the Synch Field, the counter is incremented. At the end of these eight t_bit, the counter is stopped. At this moment, the 16 most significant bits of the counter (value divided by 8) give the new clock divider (LINCD) and the three least significant bits of this value (the remainder) give the new fractional part (LINFP).

Once the Synch Field has been entirely received, the clock divider (LINCD) and the fractional part (LINFP) are updated in the LIN Baud Rate register (US_LINBRR) with the computed values, if the Synchronization is not disabled by the SYNCDIS bit in the LIN Mode register (US_LINMR).

After reception of the Synch Field:

If it appears that the computed baud rate deviation compared to the initial baud rate is superior to the maximum tolerance FTol_Unsynch (±15%), then the clock divider (LINCD) and the fractional part (LINFP) are not updated, and the error flag US_CSR.LINSTE is set to ‘1’.
If it appears that the sampled Synch character is not equal to 0x55, then the clock divider (LINCD) and the fractional part (LINFP) are not updated, and the error flag US_CSR.LINISFE is set to ‘1’.

Flags LINSTE and LINISFE are reset by writing US_CR.RSTSTA to ‘1’.

Figure 2. Slave Node Synchronization

The accuracy of the synchronization depends on several parameters:

Nominal clock frequency (f_Nom) (the theoretical slave node clock frequency)
Baud Rate
Oversampling (OVER = 0 => 16X or OVER = 1 => 8X)

The following formula is used to compute the deviation of the slave bit rate relative to the master bit rate after synchronization (f_SLAVE is the real slave node clock frequency):

Baud rate deviation=100×α×8×2−OVER+β]×Baud rate8×fSLAVE%

Baud rate deviation=100×α×8×2−OVER+β]×Baud rate8×fTOL_UNSYNCH100× fNom%

−0.5≤α≤+0.5 -1<β<+1

f_{TOL_UNSYNCH} is the deviation of the real slave node clock from the nominal clock frequency. The LIN Standard imposes that it must not exceed ±15%. The LIN Standard imposes also that for communication between two nodes, their bit rate must not differ by more than ±2%. This means that the baud rate deviation must not exceed ±1%.

It follows from that, a minimum value for the nominal clock frequency:

fNommin=100×0.5×8×2−OVER+1×Baud rate8×−15100+1×1%Hz

Examples:

Baud rate = 20 kbit/s, OVER = 0 (Oversampling 16X) => f_Nom(min) = 2.64 MHz
Baud rate = 20 kbit/s, OVER = 1 (Oversampling 8X) => f_Nom(min) = 1.47 MHz
Baud rate = 1 kbit/s, OVER = 0 (Oversampling 16X) => f_Nom(min) = 132 kHz
Baud rate = 1 kbit/s, OVER = 1 (Oversampling 8X) => f_Nom(min) = 74 kHz