ISI_DMA_C_DSCR

DMA Codec Descriptor Address Register

  0x58 32 Read/Write 0x00000000  

DMA Codec Descriptor Address Register

Bit  31 30 29 28 27 26 25 24  
  C_DSCR[29:22]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 0 0  
Bit  23 22 21 20 19 18 17 16  
  C_DSCR[21:14]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 0 0  
Bit  15 14 13 12 11 10 9 8  
  C_DSCR[13:6]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 0 0  
Bit  7 6 5 4 3 2 1 0  
  C_DSCR[5:0]      
Access  R/W R/W R/W R/W R/W R/W      
Reset  0 0 0 0 0 0      

Bits 31:2 – C_DSCR[29:0]: Codec Descriptor Base Address

Codec Descriptor Base Address

This address is word-aligned.