The modes detailed above are the main low-power modes. Each part can be set to on or off separately and wake up sources can be individually configured. The following table provides a summary of the configurations of the low-power modes.
Mode | SUPC, 32 kHz Oscillator, RTC, RTT Backup SRAM (BRAM), Backup Registers (GPBR), POR (Backup Area) | Regulator | Core Memory Peripherals | Mode Entry Configuration | Potential Wakeup Sources | Core at Wakeup | PIO State while in Low-Power Mode | PIO State at Wakeup | Wakeup Time (see Note 2) |
---|---|---|---|---|---|---|---|---|---|
Backup Mode | ON | OFF | OFF (Not powered) | SUPC_CR.VROFF = 1 SLEEPDEEP = 1 (see Note 1) | WKUP0–13 pins Supply Monitor RTC alarm RTT alarm |
Reset | Previous state maintained | PIOA, PIOB, PIOC, PIOD & PIOE inputs with pullups | < 2 ms |
Wait Mode w/Flash in Deep Power-down Mode | ON | ON | Powered (Not clocked) | PMC_MCKR.MDIV = 0 , CKGR_MOR.WAITMODE =1 , SLEEPDEEP = 0 , PMC_FSMR.LPM = 1 , PMC_FSMR.FLPM = 1 (see Note 1) | WKUP0–13 pins
RTC RTT USBHS Processor debug (see Note 6) GMAC Wake on LAN event Wakeup from CAN (see Note 7) |
Clocked back (see Note 3) | Previous state maintained | Unchanged | < 10 μs |
Wait Mode w/Flash in Standby Mode | ON | ON | Powered (Not clocked) | PMC_MCKR.MDIV = 0 , CKGR_MOR.WAITMODE =1 , SLEEPDEEP = 0 , PMC_FSMR.LPM = 1 , PMC_FSMR.FLPM = 0 (see Note 1) | WKUP0–13 pins RTC RTT USBHS Processor debug (see Note 6) GMAC Wake on LAN Wakeup from CAN (see Note 7) |
Clocked back (see Note 3) | Previous state maintained | Unchanged | < 10 μs |
Sleep Mode | ON | ON | Powered (Not clocked) (see Note 4) | WFI SLEEPDEEP = 0 PMC_FSMR.LPM = 0 (see Note 1) | Any enabled Interrupt | Clocked back | Previous state maintained | Unchanged | (see Note 5) |