PIR6

Peripheral Interrupt Request Register 6
Note: Interrupt flag bits are set when an Interrupt condition occurs, regardless of the state of its corresponding enable bit or the Global Enable (GIE) bit. User software may ensure the appropriate interrupt flag bits are cleared before enabling an interrupt.
Name:
PIR6
Offset:
0x0092
Reset:
Access:
Bit76543210
ZCDIFADTIFADIF
AccessR/W/HSR/W/HSR/W/HS
Reset000

Bit 2 – ZCDIF: Zero-Cross Detect (ZCD) Interrupt Flag

Zero-Cross Detect (ZCD) Interrupt Flag

ValueDescription
1 A ZCD interrupt occurred (must be cleared in software)
0 A ZCD interrupt has not occurred

Bit 1 – ADTIF: ADC Threshold Interrupt Flag

ADC Threshold Interrupt Flag

ValueDescription
1 ADC Threshold interrupt has occurred (must be cleared in software)
0 ADC Threshold interrupt event has not occurred

Bit 0 – ADIF: ADC Interrupt Flag

ADC Interrupt Flag

ValueDescription
1 ADC interrupt has occurred (must be cleared in software)
0 ADC interrupt event has not occurred