Analog-to-Digital Converter (ADC) Conversion Timing Specifications

Table 1.
Standard Operating Conditions (unless otherwise stated)
Param No. Sym. Characteristic Min. Typ. † Max. Units Conditions
AD20 TAD ADC Clock Period 0.5 9 μs Using FOSC as the ADC clock source ADOCS = 0
2 μs Using ADCRC as the ADC clock source ADOCS = 1
AD21 TCNV Conversion Time 14 TAD+2TCY Using FOSC as the ADC clock source ADOCS = 0
16 TAD+2TCY Using ADCRC as the ADC clock source ADOCS = 1
AD22 THCD Sample-and-Hold Capacitor Disconnect Time 2 TAD+1TCY Using FOSC as the ADC clock source ADOCS = 0
3 TAD+2TCY Using ADCRC as the ADC clock source ADOCS = 1

* These parameters are characterized but not tested.

† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Figure 1. ADC Conversion Timing (ADC Clock FOSC-Based)
Figure 2. ADC Conversion Timing (ADC Clock from ADCRC)
Note:
  1. 1.If the ADC clock source is selected as ADCRC, a time of TCY is added before the ADC clock starts. This allows the SLEEP instruction to be executed.