The following steps illustrate how to properly configure the CRC:
- 1.Determine if the automatic
program memory scan will be used with the scanner or manual calculation through
the SFR interface and perform the actions specified in the CRC Data Sources
section.
- a.To configure the scanner
module to be used with CRC, refer to the “Configuring the
Scanner” section for more information.
- 2.When applicable, seed a starting
CRC value into the CRCOUT registers.
- 3.Program the CRCXOR
registers with the desired generator polynomial.
- 4.Program the DLEN bits with the length of the data word (refer to Figure 1). This value determines how many times the shifter will
shift into the accumulator for each data word.
- 5.Program the PLEN bits with the length of the polynomial (refer to Figure 1).
- 6.Determine whether shifting in
trailing zeroes is desired and set the ACCM bit accordingly.
- 7.Determine whether the MSb or LSb
first shifting is desired, and write the SHIFTM bit accordingly.
- 8.Set the GO bit to begin the shifting process.
- 9.If manual SFR entry is used,
monitor the FULL bit.
- a.When FULL =
0
, another word of data can be written to the CRCDATA registers. It is important to note that the Most
Significant Byte (CRCDATAH) must be written first if the data has more
than eight bits, as the shifter will begin upon the CRCDATAL register
being written.
- b.If the scanner is used,
the scanner will automatically load words into the CRCDATA registers as
needed, as long as the GO bit is set.
- 10.If using the Flash memory
scanner, monitor the SCANIF bit of the corresponding PIR register to determine
when the scanner has finished pushing data into the CRCDATA registers.
- a.After the scan is
completed, monitor the SGO bit to determine that the CRC has been
completed and the check value can be read from the CRCOUT
registers.
- b.When both the interrupt
flags are set (or both BUSY and SGO bits are cleared), the completed
CRC calculation can be read from the CRCOUT registers.
- 11.If manual entry is used, monitor
the BUSY bit to determine when the CRCOUT registers hold the valid check
value.