PIE2

Peripheral Interrupt Enable Register 2
Note: Bit PEIE of the INTCON register must be set to enable any peripheral interrupt controlled by registers PIE1 through PIE6.
Name:
PIE2
Offset:
0x0098
Reset:
Access:
Bit76543210
CCP2IECCP1IETMR4IETMR2IETMR3GIETMR3IE
AccessR/WR/WR/WR/WR/WR/W
Reset000000

Bit 6 – CCP2IE: CCP2 Interrupt Enable

CCP2 Interrupt Enable

ValueDescription
1 CCP2 interrupts are enabled
0 CCP2 interrupts are disabled

Bit 5 – CCP1IE: CCP1 Interrupt Enable

CCP1 Interrupt Enable

ValueDescription
1 CCP1 interrupts are enabled
0 CCP1 interrupts are disabled

Bit 3 – TMR4IE: TMR4 Interrupt Enable

TMR4 Interrupt Enable

ValueDescription
1 TMR4 interrupts are enabled
0 TMR4 interrupts are disabled

Bit 2 – TMR2IE: TMR2 Interrupt Enable

TMR2 Interrupt Enable

ValueDescription
1 TMR2 interrupts are enabled
0 TMR2 interrupts are disabled

Bit 1 – TMR3GIE: TMR3 Gate Interrupt Enable

TMR3 Gate Interrupt Enable

ValueDescription
1 TMR3 Gate interrupts are enabled
0 TMR3 Gate interrupts are disabled

Bit 0 – TMR3IE: TMR3 Interrupt Enable

TMR3 Interrupt Enable

ValueDescription
1 TMR3 interrupts are enabled
0 TMR3 interrupts are disabled