TMR1 - Timer1 Module with Gate Control

The Timer1 module is a 16-bit timer/counter with the following features:

Important: References to the module Timer1 apply to all the odd numbered timers on this device.
Figure 1. Timer1 Block Diagram
  1. 1.This signal comes from the pin selected by Timer1 PPS register.
  2. 2.TMRx register increments on rising edge.
  3. 3.Synchronize does not operate while in Sleep.
  4. 4.See TxCLK for clock source selections.
  5. 5.See TxGATE for gate source selections.
  6. 6.Synchronized comparator output must not be used in conjunction with synchronized input clock.