Sleep mode provides the greatest power savings because both the CPU and selected
peripherals cease to operate. However, some peripheral clocks continue to operate during
Sleep. The peripherals that use those clocks also continue to operate. Sleep mode is
entered by executing the SLEEP
instruction, while
the IDLEN bit is clear. Upon entering Sleep mode, the following conditions
exist:
- 1.The WDT will be cleared, but keeps running if enabled for
operation during Sleep.
- 2.The PD bit of
the STATUS register is cleared.
- 3.The TO bit of
the STATUS register is set.
- 4.The CPU clock is disabled.
- 5.LFINTOSC, SOSC, HFINTOSC and ADCRC (FRC) are unaffected.
Peripherals using them may continue operation during Sleep.
- 6.I/O ports maintain the status they had before Sleep was executed
(driving high, low, or high-impedance).
- 7.Resets other than WDT are not affected by Sleep mode.
Important: Refer to individual
chapters for more details on peripheral operation during Sleep.
To minimize current consumption, consider the following
conditions:
- I/O pins must not be floating
- External circuitry sinking current from I/O pins
- Internal circuitry sourcing current to I/O pins
- Current draw from pins with internal weak pull-ups
- Peripherals using clock source unaffected by Sleep
I/O pins that are high-impedance inputs need to be pulled to
VDD or VSS externally to avoid switching currents caused by
floating inputs. Examples of internal circuitry that might be consuming current include
modules such as the DAC and FVR peripherals.