PIE5

Peripheral Interrupt Enable Register 5
Note: Bit PEIE of the INTCON register must be set to enable any peripheral interrupt controlled by registers PIE1 through PIE6.
Name:
PIE5
Offset:
0x009B
Reset:
Access:
Bit76543210
CM2IECM1IEBCL2IESSP2IEBCL1IESSP1IERC2IETX2IE
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000

Bit 7 – CM2IE: Comparator 2 Interrupt Enable

Comparator 2 Interrupt Enable

ValueDescription
1 Comparator 2 interrupts are enabled
0 Comparator 2 interrupts are disabled

Bit 6 – CM1IE: Comparator 1 Interrupt Enable

Comparator 1 Interrupt Enable

ValueDescription
1 Comparator 1 interrupts are enabled
0 Comparator 1 interrupts are disabled

Bit 5 – BCL2IE: MSSP2 Bus Collision Interrupt Enable

MSSP2 Bus Collision Interrupt Enable

ValueDescription
1 MSSP2 Bus Collision interrupts are enabled
0 MSSP2 Bus Collision interrupts are disabled

Bit 4 – SSP2IE: MSSP2 Interrupt Enable

MSSP2 Interrupt Enable

ValueDescription
1 MSSP2 interrupts are enabled
0 MSSP2 interrupts are disabled

Bit 3 – BCL1IE: MSSP1 Bus Collision Interrupt Enable

MSSP1 Bus Collision Interrupt Enable

ValueDescription
1 MSSP1 Bus Collision interrupts are enabled
0 MSSP1 Bus Collision interrupts are disabled

Bit 2 – SSP1IE: MSSP1 Interrupt Enable

MSSP1 Interrupt Enable

ValueDescription
1 MSSP1 interrupts are enabled
0 MSSP1 interrupts are disabled

Bit 1 – RC2IE: EUSART2 Receive Interrupt Enable

EUSART2 Receive Interrupt Enable

ValueDescription
1 EUSART2 receive interrupts are enabled
0 EUSART2 receive interrupts are disabled

Bit 0 – TX2IE: EUSART2 Transmit Interrupt Enable

EUSART2 Transmit Interrupt Enable

ValueDescription
1 EUSART2 transmit interrupts are enabled
0 EUSART2 transmit interrupts are disabled