Contrary to the core logic power described in the previous sections, the power consumed in the
analog and I/O cells has a low temperature dependence. Typically, it drifts by about 10
to 20% over the whole temperature range of the device. This power depends on the
application use case (number of PLLs used, number of USB ports used, ADC enabled or
disabled, MIPI D-PHY enabled or disabled, number of serial ports in use and their speed,
GMAC interface use and its mode, etc.).
Tip: This power can generally be reduced by operating the
device power rails at lower and optimum operating voltages. For instance, interfacing a
Gigabit Ethernet transceiver
(1) at 1.8V consumes less power than at 3.3V. Similarly, avoiding high
voltage conditions on 3.3V inputs, i.e., avoiding 3.6V, by choosing accurate voltage
regulators
(2) is a good practice to keep the rail away from
unnecessary power dissipation.
Notes:
- 1.Microchip Gigabit Ethernet transceiver KSZ9131 can be interfaced at 1.8V.
- 2.Microchip MCP16501/502 Power
Management Integrated Circuits (PMIC), with better than ±3% accurate voltage
regulators, are recommended power supply solutions.