Dynamic ODT or Fail-Safe LVDS

Both the device families can support an internal LVDS fail-safe solution. This configuration uses a combination of the following device features:

Dynamic on-die-termination (ODT) access per I/O
Weak pull-up/pull-down resistor for differential inputs

When the LVDS input temporarily floats during operation, a bank-level input signal can dynamically turn-off the on-die termination resistor so that each leg of the LVDS pair can only see the weak pull-up and pull-down resistor enabled, creating an LVDS fail-safe input.

As per bank, ODT_EN pin can be exposed for any I/O that subscribes for DYNAMIC ODT required to be LVDS fail-safe. The user design uses the ODT_EN to switch in or out the differential termination while the weak pull-up resistor I/O attribute is added on PADP of the LVDS I/O and the PADN is weakly pulled down, automatically. The fail-safe condition has the ODT disabled leaving the pull resistors to differentially bias the PADP and PADN preventing unwanted behavior when not being driven. During normal operation, the internal ODT must be present for the LVDS receiver. During fail-safe, drive ODT_EN = 0 to disable ODT.

Figure 1. Dynamic ODT used for Fail-safe LVDS

I/O configurators that use LVDS input have the “Enable ODT_EN pin for LVDS Failsafe” option. In the I/O Editor, the ODT attribute for differential I/O's has the “Dynamic” option for differential I/Os.

Only GPIO has internal 100 Ω ODT termination that can be dynamically controlled. HSIO requires fixed, external termination resistor on PCB. The set_io PDC command supports the “-dynamic” attribute for differential I/Os.

Note: Differential transceiver reference clock inputs does include optional 100 Ω differential termination. However, dynamic failsafe is not included. Designs must not allow for XCVR REFCLK P/N pads to float. Unused REFCLK pads must follow the recommendations in the public pin-out assignment tables (PPAT).

Note: There is a known issue in the Libero SoC IOEditor and the pin report. A software limitation exists where a design cannot have different values for the P and N sides. Currently, both must have the same value. Libero SoC does program the P and N side correctly for programming. In IOEditor or pin report, if RES_PULL is up on both, it means the N side is programmed as down or visa-versa.