BASEADDR

Descriptor Memory Section Base Address

  0x34 32 PAC Write-Protection, Enable-Protected 0x00000000  
Parent topic: Register Description

Descriptor Memory Section Base Address

Bit  31 30 29 28 27 26 25 24  
                   
Access                   
Reset                   
Bit  23 22 21 20 19 18 17 16  
                   
Access                   
Reset                   
Bit  15 14 13 12 11 10 9 8  
      BASEADDR[13:8]  
Access      R/W R/W R/W R/W R/W R/W  
Reset      0 0 0 0 0 0  
Bit  7 6 5 4 3 2 1 0  
  BASEADDR[7:0]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 0 0  

Bits 13:0 – BASEADDR[13:0]: Descriptor Memory Base Address

Descriptor Memory Base Address

These bits store the Descriptor memory section base address. The value must be 64-bit aligned.