Security Control
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
KEY[7:0] | |||||||||
Access | W/-/W | W/-/W | W/-/W | W/-/W | W/-/W | W/-/W | W/-/W | W/-/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
Access | |||||||||
Reset |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
TEROW[2:0] | |||||||||
Access | RW/-/RW | RW/-/RW | RW/-/RW | ||||||
Reset | 0 | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
DXN | DSCEN | SILACC | TAMPEEN | ||||||
Access | R/-/R | RW/-/RW | RW/-/RW | RW/-/RW | |||||
Reset | x | 0 | 0 | 0 |
Write Key
When this bit group is written to the key value 0xA5, the write will be performed. If a value different from the key value is tried, the write will be discarded and INTFLAG.KEYE set.
Tamper Erase Row
Data eXecute Never
This bit status is loaded from UROW at boot.
Value | Description |
---|---|
0 | Execution out of Data Flash is authorized. |
1 | Execution out of Data Flash is not authorized. |
Silent Access
Value | Description |
---|---|
0 | Data in Tamper Erase Row is not mapped as differential data. |
1 | Data in Tamper Erase Row is mapped as differential data. |
Tamper Erase Enable
Value | Description |
---|---|
0 | RTC tamper event has no effect. |
1 | RTC tamper event triggers a Tamper Erase. |
Data Scramble Enable
Value | Description |
---|---|
0 | Secure Data FLASH is not scrambled. |
1 | Secure Data FLASH is scrambled. |