Features
- 32-bit AHB interface for reads and
writes
- Write-While-Read (WWR) Data Flash
- All NVM sections are memory mapped to
the AHB, including calibration and system configuration
- 32-bit APB interface for commands and
control
- Programmable wait states for read
optimization
- 6
regions can be individually protected or unprotected
- Additional protection for
bootloader
- Interface to power manager for
power-down of Flash blocks in sleep modes
- Can optionally wake-up on exit from
sleep or on first access
- Direct-mapped cache
- TrustZone Support (SAM L11)