Peripheral Interrupt Flag Status and Clear B
This flag is cleared by writing a '1' to the flag.
This flag is set when a Peripheral Access Error occurs while accessing the peripheral associated with the respective INTFLAGB bit, and will generate an interrupt request if INTENCLR/SET.ERR is '1'.
Writing a '0' to this bit has no effect.
Writing a '1' to this bit will clear the corresponding INTFLAGB interrupt flag.
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
Access | |||||||||
Reset |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
Access | |||||||||
Reset |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
Access | |||||||||
Reset |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
Reserved | DMAC | NVMCTRL | DSU | IDAU | |||||
Access | RW/-/RW | RW/-/RW | RW/-/RW | RW/-/RW | RW/-/RW | ||||
Reset | 0 | 0 | 0 | 0 | 0 |
Reserved
Interrupt Flag for DMAC
Interrupt Flag for NVMCTRL
Interrupt Flag for DSU
Interrupt Flag for IDAU