Oversampling and Decimation

By using oversampling and decimation, the ADC resolution can be increased from 12 bits up to 16 bits, for the cost of reduced effective sampling rate.

Note: To perform oversampling and decimation, the Conversion Result Resolution field in the Control C register (CTRLC.RESSEL) must be set to 16-bit mode.

To increase the resolution by ‘n’ bits, 4n samples must be accumulated. The result must then be right shifted by ‘n’ bits. This right shift is a combination of the automatic right shift and the value written to AVGCTRL.ADJRES. To obtain the correct resolution, the ADJRES must be configured as described in the table below. This method will result in ‘n’ bit extra LSB resolution.

Table 1. Configuration Required for Oversampling and Decimation
Result Resolution Number of Samples to Average AVGCTRL.SAMPLENUM[3:0] Number of Automatic Right Shifts AVGCTRL.ADJRES[2:0]
13 bits 41 = 4 0x2 0 0x1
14 bits 42 = 16 0x4 0 0x2
15 bits 43 = 64 0x6 2 0x1
16 bits 44 = 256 0x8 4 0x0