CFGA

Configuration A

  0x02 16 PAC Write-Protection, Enable-protected 0x0000  

Configuration A

Bit  15 14 13 12 11 10 9 8  
  DIVREF                
Access  R/W                
Reset  0                
Bit  7 6 5 4 3 2 1 0  
  REFNUM[7:0]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 0 0  

Bit 15 – DIVREF: Divide Reference Clock

Divide Reference Clock

Divides the reference clock by 8

ValueDescription
0 The reference clock is divided by 1.
1 The reference clock is divided by 8.

Bits 7:0 – REFNUM[7:0]: Number of Reference Clock Cycles

Number of Reference Clock Cycles

Selects the duration of a measurement in number of CLK_FREQM_REF cycles. This must be a non-zero value, i.e. 0x01 (one cycle) to 0xFF (255 cycles).