The AC bus clock (CLK_AC_APB) can be enabled and disabled in the Main Clock module, MCLK (see MCLK - Main Clock, and the default state of CLK_AC_APB can be found in Peripheral Clock Masking.

A generic clock (GCLK_AC) is required to clock the AC. This clock must be configured and enabled in the generic clock controller before using the AC. Refer to the Generic Clock Controller chapter for details.

This generic clock is asynchronous to the bus clock (CLK_AC_APB). Due to this asynchronicity, writes to certain registers will require synchronization between the clock domains. Refer to Synchronization for further details.