EVCTRL

Event Control

  0x06 16 PAC Write-Protection, Enable-Protected 0x0000  

Event Control

Bit  15 14 13 12 11 10 9 8  
      MCEO1 MCEO0       OVFEO  
Access      R/W R/W       R/W  
Reset      0 0       0  
Bit  7 6 5 4 3 2 1 0  
      TCEI TCINV   EVACT[2:0]  
Access      R/W R/W   R/W R/W R/W  
Reset      0 0   0 0 0  

Bits 12, 13 – MCEOx: Match or Capture Channel x Event Output Enable [x = 1..0]

Match or Capture Channel x Event Output Enable [x = 1..0]

These bits enable the generation of an event for every match or capture on channel x.

ValueDescription
0 Match/Capture event on channel x is disabled and will not be generated.
1 Match/Capture event on channel x is enabled and will be generated for every compare/capture.

Bit 8 – OVFEO: Overflow/Underflow Event Output Enable

Overflow/Underflow Event Output Enable

This bit enables the Overflow/Underflow event. When enabled, an event will be generated when the counter overflows/underflows.

ValueDescription
0 Overflow/Underflow event is disabled and will not be generated.
1 Overflow/Underflow event is enabled and will be generated for every counter overflow/underflow.

Bit 5 – TCEI: TC Event Enable

TC Event Enable

This bit is used to enable asynchronous input events to the TC.

ValueDescription
0 Incoming events are disabled.
1 Incoming events are enabled.

Bit 4 – TCINV: TC Inverted Event Input Polarity

TC Inverted Event Input Polarity

This bit inverts the asynchronous input event source.

ValueDescription
0 Input event source is not inverted.
1 Input event source is inverted.

Bits 2:0 – EVACT[2:0]: Event Action

Event Action

These bits define the event action the TC will perform on an event.

ValueNameDescription
0x0 OFF Event action disabled
0x1 RETRIGGER Start, restart or retrigger TC on event
0x2 COUNT Count on event
0x3 START Start TC on event
0x4 STAMP Time stamp capture
0x5 PPW Period captured in CC0, pulse width in CC1
0x6 PWP Period captured in CC1, pulse width in CC0
0x7 PW Pulse width capture