DATA

Data DAC

  0x08 16 PAC Write-Protection, Write-Synchronized 0x0000  
Parent topic: Register Description

Data DAC

Bit  15 14 13 12 11 10 9 8  
  DATA[15:8]  
Access  W W W W W W W W  
Reset  0 0 0 0 0 0 0 0  
Bit  7 6 5 4 3 2 1 0  
  DATA[7:0]  
Access  W W W W W W W W  
Reset  0 0 0 0 0 0 0 0  

Bits 15:0 – DATA[15:0]: Data value to be converted

Data value to be converted

DATA register contains the 10-bit value that is converted to a voltage by the DAC. The adjustment of these 10 bits within the 16-bit register is controlled by CTRLB.LEFTADJ.

Four additional bits are also used for the dithering feature according to Dithering mode.

Table 1. Valid Data Bits
CTRLB.DITHER CTRLB.LEFTADJ DATA Description
0 0 DATA[9:0] Right adjusted, 10-bits
0 1 DATA[15:6] Left adjusted, 10-bits
1 0 DATA[13:4], DATA[3:0] Right adjusted, 14-bits
1 1 DATA[15:6], DATA[5:2] Left adjusted, 14-bits