Host with multiple clients in parallel is only available when Host SPI Select Enable (CTRLB.MSSEN) is set to zero and hardware SS control is disabled. If the bus consists of several SPI clients, a SPI host can use general purpose I/O pins to control the SS line to each of the clients on the bus, as shown in the following figure. In this configuration, the single selected SPI client will drive the tri-state MISO line.
Another configuration is multiple clients in series, as shown in the following figure. In this configuration, all n attached clients are connected in series. A common SS line is provided to all clients, enabling them simultaneously. The host must shift n characters for a complete transaction. Depending on the Host SPI Select Enable bit (CTRLB.MSSEN), the SS line can be controlled either by hardware or user software and normal GPIO.