Interrupt Enable Clear
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
Access | |||||||||
Reset |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
Access | |||||||||
Reset |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
Access | |||||||||
Reset |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
CLKFAIL | XOSC32KRDY | ||||||||
Access | R/W | R/W | |||||||
Reset | 0 | 0 |
XOSC32K Clock Failure Detection Interrupt Enable
Writing a '0' to this bit has no effect.
Writing a '1' to this bit will clear the XOSC32K Clock Failure Interrupt Enable bit, which disables the XOSC32K Clock Failure interrupt.
Value | Description |
---|---|
0 | The XOSC32K Clock Failure Detection is disabled. |
1 | The XOSC32K Clock Failure Detection is enabled. An interrupt request will be generated when the XOSC32K Clock Failure Detection interrupt flag is set. |
XOSC32K Ready Interrupt Enable
Writing a '0' to this bit has no effect.
Writing a '1' to this bit will clear the XOSC32K Ready Interrupt Enable bit, which disables the XOSC32K Ready interrupt.
Value | Description |
---|---|
0 | The XOSC32K Ready interrupt is disabled. |
1 | The XOSC32K Ready interrupt is enabled. |