NONSECB

Peripheral Non-Secure Status - Bridge B

This register is loaded from UROW at boot.

Important: This register is only available for SAM L11 and has no effect for SAM L10.

Reading NONSEC register returns peripheral security attribution status:

Value Description
0 Peripheral is secured.
1 Peripheral is non-secured.
  0x58 32 Write-Secure x initially determined from NVM User Row after reset  
Parent topic: Register Description

Peripheral Non-Secure Status - Bridge B

Bit  31 30 29 28 27 26 25 24  
                   
Access                   
Reset                   
Bit  23 22 21 20 19 18 17 16  
                   
Access                   
Reset                   
Bit  15 14 13 12 11 10 9 8  
                   
Access                   
Reset                   
Bit  7 6 5 4 3 2 1 0  
        HMATRIXHS DMAC NVMCTRL DSU IDAU  
Access        R/R/R R/R/R R/R/R R/R/R R/R/R  
Reset        x x 0 1 0  

Bit 4 – HMATRIXHS: Peripheral HMATRIXHS Non-Secure

Peripheral HMATRIXHS Non-Secure

Bit 3 – DMAC: Peripheral DMAC Non-Secure

Peripheral DMAC Non-Secure

Bit 2 – NVMCTRL: Peripheral NVMCTRL Non-Secure

Peripheral NVMCTRL Non-Secure

The NVMCTRL Peripheral is always secured.

Bit 1 – DSU: Peripheral DSU Non-Secure

Peripheral DSU Non-Secure

The DSU Peripheral is always non-secured.

Bit 0 – IDAU: Peripheral IDAU Non-Secure

Peripheral IDAU Non-Secure

The IDAU Peripheral is always secured.