ADDR

Address

ADDR drives the hardware address to the NVM when a command is executed using CMDEX. This is a Byte aligned address. This register is automatically updated upon AHB writes to the page buffer.

  0x1C 32 PAC Write-Protection, Secure 0x00000000  
Parent topic: Register Description

Address

Bit  31 30 29 28 27 26 25 24  
                   
Access                   
Reset                   
Bit  23 22 21 20 19 18 17 16  
  ARRAY[1:0]              
Access  RW/-/RW RW/-/RW              
Reset  0 0              
Bit  15 14 13 12 11 10 9 8  
  AOFFSET[15:8]  
Access  RW/-/RW RW/-/RW RW/-/RW RW/-/RW RW/-/RW RW/-/RW RW/-/RW RW/-/RW  
Reset  0 0 0 0 0 0 0 0  
Bit  7 6 5 4 3 2 1 0  
  AOFFSET[7:0]  
Access  RW/-/RW RW/-/RW RW/-/RW RW/-/RW RW/-/RW RW/-/RW RW/-/RW RW/-/RW  
Reset  0 0 0 0 0 0 0 0  

Bits 23:22 – ARRAY[1:0]: Array Select

Array Select

ValueDescription
00 Flash
01 Data Flash
10 NVM Rows

Bits 15:0 – AOFFSET[15:0]: Array Offset

Array Offset

Address offset