Address
ADDR drives the hardware address to the NVM when a command is executed using CMDEX. This is a Byte aligned address. This register is automatically updated upon AHB writes to the page buffer.
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
Access | |||||||||
Reset |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
ARRAY[1:0] | |||||||||
Access | RW/-/RW | RW/-/RW | |||||||
Reset | 0 | 0 |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
AOFFSET[15:8] | |||||||||
Access | RW/-/RW | RW/-/RW | RW/-/RW | RW/-/RW | RW/-/RW | RW/-/RW | RW/-/RW | RW/-/RW | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
AOFFSET[7:0] | |||||||||
Access | RW/-/RW | RW/-/RW | RW/-/RW | RW/-/RW | RW/-/RW | RW/-/RW | RW/-/RW | RW/-/RW | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Array Select
Value | Description |
---|---|
00 | Flash |
01 | Data Flash |
10 | NVM Rows |
Array Offset
Address offset