CTRLB

Control B

  0x01 8 PAC Write-Protection, Enable-Protected 0x00  
Parent topic: Register Description

Control B

Bit  7 6 5 4 3 2 1 0  
  REFSEL[1:0] DITHER   VPD LEFTADJ IOEN EOEN  
Access  R/W R/W R/W   R/W R/W R/W R/W  
Reset  0 0 0   0 0 0 0  

Bits 7:6 – REFSEL[1:0]: Reference Selection

Reference Selection

This bit field selects the Reference Voltage for the DAC.

Important: For the SAM L10/L11 devices, the 1.1V voltage reference typical value must be selected in case of an internal voltage reference (INTREF). Refer to the Supply Controller VREF register.
ValueNameDescription
0x0 INTREF Internal voltage reference
0x1 VDDANA Analog voltage supply
0x2 VREFA External reference
0x3   Reserved

Bit 5 – DITHER: Dithering Mode

Dithering Mode

This bit controls dithering operation according to Dithering mode.

ValueDescription
0 Dithering mode is disabled.
1 Dithering mode is enabled.

Bit 3 – VPD: Voltage Pump Disabled

Voltage Pump Disabled

This bit controls the behavior of the voltage pump.

ValueDescription
0 Voltage pump is turned on/off automatically
1 Voltage pump is disabled.

Bit 2 – LEFTADJ: Left-Adjusted Data

Left-Adjusted Data

This bit controls how the 10-bit conversion data is adjusted in the Data and Data Buffer registers.

ValueDescription
0 DATA and DATABUF registers are right-adjusted.
1 DATA and DATABUF registers are left-adjusted.

Bit 1 – IOEN: Internal Output Enable

Internal Output Enable

ValueDescription
0 Internal DAC output not enabled.
1 Internal DAC output enabled to be used by the AC or ADC.

Bit 0 – EOEN: External Output Enable

External Output Enable

ValueDescription
0 The DAC output is turned off.
1 The high-drive output buffer drives the DAC output to the VOUT pin.