Programming

In this step, the following tasks are executed:

1.Generating the FPGA Array Data
2.Configuring memories
3.Generating initialization clients for configured memories
4.Generating design initialization data
5.Generating and exporting the programming bit stream (.stp and .job)

In libero.tcl, use the following commands to execute these tasks.

run_tool -name {GENERATEPROGRAMMINGDATA}
generate_design_initialization_data  
run_tool -name {GENERATEPROGRAMMINGFILE}

export_bitstream_file \
         -file_name {test} \
         -format {STP DAT PPD } \
         -limit_SVF_file_size 0 \
         -limit_SVF_file_by_max_filesize_or_vectors {SIZE} \
         -svf_max_filesize {1024} \
         -svf_max_vectors {1000} \
         -trusted_facility_file 1 \
         -trusted_facility_file_components {FABRIC SNVM} \
         -zeroization_likenew_action 0 \
         -zeroization_unrecoverable_action 0

export_prog_job \
         -job_file_name {test} \
         -bitstream_file_type {TRUSTED_FACILITY} \
         -bitstream_file_components {FABRIC SNVM} \
         -zeroization_likenew_action 0 \
         -zeroization_unrecoverable_action 0 \
         -program_design 1 \
         -program_spi_flash 0 \
         -design_bitstream_format {PPD}

close_project -save 1

Use these commands with the catch statement as shown in the following snippet.

if {[catch {run_tool -name {GENERATEPROGRAMMINGDATA}  }] } {
	  puts "GENERATEPROGRAMMINGDATA FAILED \n"
   } else {
	  puts "GENERATEPROGRAMMINGDATA PASSED \n"
   }

if {[catch {generate_design_initialization_data}  }] } {
	  puts "DESIGN INITIALIZATION FAILED \n"
   } else {
	  puts "DESIGN INITIALIZATION PASSED \n"
   }        

if {[catch {run_tool -name {GENERATEPROGRAMMINGFILE}  }] } {
	  puts "GENERATEPROGRAMMINGFILE FAILED \n"
   } else {
	  puts "GENERATEPROGRAMMINGFILE PASSED \n"
   }

For more information about adding programming parameters, see Tcl Commands Reference Guide for Libero SoC Design Suite.