I3CxERRIE1

I3CxERRIE1

Error Interrupt Enable 1

Note: Refer to I3CxERRIR1 register for the corresponding interrupt flag bits.
0x08F, 0x0C0 8     1index x
Parent topic: Register Definitions: I3C Control

I3CxERRIE1

Bit  7 6 5 4 3 2 1 0  
          IBIAEIE MWLOEIE TXWEIE RXREIE  
Access          R/W R/W R/W R/W  
Reset          0 0 0 0  

Bit 3 – IBIAEIE: In-Band Interrupt Abort Error Interrupt Enable

In-Band Interrupt Abort Error Interrupt Enable

ValueDescription
1 In-Band Interrupt Abort Error Interrupt is enabled
0 In-Band Interrupt Abort Error Interrupt is disabled

Bit 2 – MWLOEIE: Maximum Write Length Over Size Error Interrupt Enable

Maximum Write Length Over Size Error Interrupt Enable

ValueDescription
1 Maximum Write Length Over Size Error Interrupt is enabled
0 Maximum Write Length Over Size Error Interrupt is disabled

Bit 1 – TXWEIE: Transmit Buffer Write Error Interrupt Enable

Transmit Buffer Write Error Interrupt Enable

ValueDescription
1 Transmit Buffer Write Error Interrupt is enabled
0 Transmit Buffer Write Error Interrupt is disabled

Bit 0 – RXREIE: Receive Buffer Read Error Interrupt Enable

Receive Buffer Read Error Interrupt Enable

ValueDescription
1 Receive Buffer Read Error Interrupt is enabled
0 Receive Buffer Read Error Interrupt is disabled