Page Erase

The erase size is always 128 words. Only through the use of an external programmer can larger areas of program memory be Bulk Erased. Word erase in the program memory is not supported.

When initiating an erase sequence from user code, a page of 128 words of program memory is erased. The NVMADR[21:8] bits point to the page being erased. The NVMADR[7:0] bits are ignored. The NVMCON0 and NVMCON1 registers command the erase operation. The NVMCMD bits are set to select the erase operation. The GO bit is set to initiate the erase operation as the last step in the unlock sequence.

The NVM unlock sequence described in the Unlock Sequence section must be used; this guards against accidental writes. Instruction execution is halted during the erase cycle. The erase cycle is terminated by the internal programming timer.

The sequence of events for erasing a page of PFM is:

  1. 1.Set the NVMADR registers to an address within the intended page.
  2. 2.Set the NVMCMD control bits to ‘b110 (Page Erase).
  3. 3.Disable all interrupts.
  4. 4.Perform the unlock sequence as described in the Unlock Sequence section.
  5. 5.Set the GO bit to start the PFM page erase.
  6. 6.Monitor the GO bit or NVMIF interrupt flag to determine when the erase has completed.
  7. 7.Interrupts can be enabled after the GO bit is clear.
  8. 8.Set the NVMCMD control bits to ‘b000.

If the PFM address is write-protected, the GO bit will be cleared, the erase operation will not take place, and the WRERR bit will be set.

While erasing the PFM page, the CPU operation is suspended and then resumes when the operation is complete. Upon erase completion, the GO bit is cleared in hardware, the NVMIF is set, and an interrupt will occur (if the NVMIE bit is set and interrupts are enabled).

The buffer RAM data are not affected by erase operations and the NVMCMD bits will remain unchanged throughout the erase opeation.

Figure 1. PFM Page Erase Flowchart

Erasing a Page of Program Flash Memory in C

// Code sequence to erase one page of PFM
// PFM target address is specified by PAGE_ADDR

// Save interrupt enable bit value
uint8_t GIEBitValue = INTCON0bits.GIE;

// Load NVMADR with the base address of the memory page
NVMADR = PAGE_ADDR;              
NVMCON1bits.CMD = 0x06;            // Set the page erase command
INTCON0bits.GIE = 0;               // Disable interrupts
//––––––––– Required Unlock Sequence ––––––––– 
NVMLOCK = 0x55;
NVMLOCK = 0xAA;
NVMCON0bits.GO = 1;                // Start page erase
//–––––––––––––––––––––––––––––––––––––––––––––
while (NVMCON0bits.GO);            // Wait for the erase operation to complete
// Verify erase operation success and call the recovery function if needed
if (NVMCON1bits.WRERR){             
   ERASE_FAULT_RECOVERY();
}

INTCON0bits.GIE = GIEBitValue;     // Restore interrupt enable bit value
NVMCON1bits.CMD = 0x00;            // Disable writes to memory
Important:
  • If a write or erase operation is terminated by an unexpected Reset, the WRERR bit will be set and the user can check to decide whether a rewrite of the location(s) is needed.
  • If a write or erase operation is attempted on a write-protected area, the WRERR bit will be set.
  • If a write or erase operation is attempted on an invalid address location, the WRERR bit is set. (Refer to the Program and Data Memory Map in the “Memory Organization” chapter for more information on valid address locations.)
Parent topic: Program Flash Memory (PFM)