User-assigned interrupt priority is enabled by setting IPEN. Each
peripheral interrupt source can be assigned a high- or low-priority level by the user.
The user-assignable interrupt priority control bits for each interrupt are located in
the IPRx registers, which are device-specific and can be found in the respective data
sheet for each device.
The interrupts are serviced based on a predefined interrupt priority scheme
detailed below.
- 1.Interrupts set by the user as a
high-priority interrupt have higher precedence of execution. High-priority
interrupts will override a low-priority request when:
- a.A low-priority interrupt has
been requested or its request is already pending.
- b.A low and high-priority
interrupt are triggered concurrently (i.e., on the same instruction
cycle).(1)
- c.A low-priority interrupt was
requested and the corresponding Interrupt Service Routine is currently
executing. In this case, the lower priority interrupt routine will be
interrupted then complete executing after the high-priority interrupt has
been serviced.(2)
- 2.Interrupts set by the user as low
priority have a lower priority of execution and are preempted by any high-priority
interrupt.
- 3.Interrupts defined with the same
software priority cannot preempt or interrupt each other. Concurrent pending
interrupts with the same user priority are resolved using the natural order priority
(when vectored interrupts are enabled) or in the order the interrupt flag bits are
polled in the ISR (when vectored interrupts are disabled).
Important:
- 1.When a high-priority interrupt
preempts a concurrent low-priority interrupt, GIEL
may be cleared in the high-priority Interrupt Service Routine. If GIEL is
cleared, the low-priority interrupt will NOT be serviced, even if it was
originally requested. The corresponding interrupt flag needs to be cleared in
user code.
- 2.When a high-priority interrupt is
requested while a low-priority Interrupt Service Routine is executing, GIEL may
be cleared in the high-priority Interrupt Service Routine. The pending
low-priority interrupt will resume, even if GIEL is cleared.