I3CxMRS

I3CxMRS

Maximum Read Speed

Note:
  1. 1.This register follows the definition of GETMXDS CCC Maximum Write Speed Byte format as per the MIPI I3C Basic 1.0 Specification. The Controller can read this byte during GETMXDS CCC.
0x0AC, 0x0DD 8     1index x

I3CxMRS

Bit  7 6 5 4 3 2 1 0  
  MRS[7:6] MRS[5:3] MRS[2:0]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 0 0  

Bits 7:6 – MRS[7:6]: MIPI Reserved

MIPI Reserved

Bits 5:3 – MRS[5:3]: Clock To Data Turnaround Time (TSCO)

Clock To Data Turnaround Time (TSCO)

ValueDescription
111 TSCO > 12 ns, and is reported by private agreement
110 MIPI Reserved
101 MIPI Reserved
100 ≤12 ns
011 ≤11 ns
010 ≤10 ns
001 ≤9 ns
000 ≤8 ns

Bits 2:0 – MRS[2:0]: Maximum Read Speed for Non-CCC Messages

Maximum Read Speed for Non-CCC Messages

ValueDescription
111 MIPI Reserved
110 MIPI Reserved
101 MIPI Reserved
100 2 MHz
011 4 MHz
010 6 MHz
001 8 MHz
000 FSCL Max