Reset, WDT, Oscillator Start-Up Timer, Power-Up Timer, Brown-Out Reset and Low-Power Brown-Out Reset Specifications

Figure 1. Reset, Watchdog Timer, Oscillator Start-Up Timer and Power-Up Timer Timing
Note:
  1. 1.Asserted low.
Figure 2. Brown-out Reset Timing and Characteristics
Note:
  1. 1.Only if the PWRTE Configuration bit is programmed to ‘1’; 2 ms delay if PWRTE = 0.
Table 1.
Standard Operating Conditions (unless otherwise stated)
Param No. Sym. Characteristic Min. Typ. † Max. Units Conditions
RST01* TMCLR MCLR Pulse Width Low to ensure Reset μs  
RST02* TIOZ I/O high-impedance from Reset detection 2 μs  
RST03 TWDT Watchdog Timer Time-out Period 16 ms WDTCPS = 00100
RST04* TPWRT Power-up Timer Period 65 ms  
RST05 TOST Oscillator Start-up Timer Period(1,2) 1024 TOSC  
RST06 VBOR Brown-out Reset Voltage

2.7

2.55

2.3

1.8

2.85

2.7

2.45

1.9

3.0

2.85

2.6

2.1

V

V

V

V

BORV = 00

BORV = 01

BORV = 10

BORV = 11

RST07 VBORHYS Brown-out Reset Hysteresis 60 mV BORV = 00
RST08 TBORDC Brown-out Reset Response Time 3 μs  
RST09 VLPBOR Low-Power Brown-out Reset Voltage 1.8 1.9 2.2 V  

* These parameters are characterized but not tested.

† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Notes:
  1. 1.By design, the Oscillator Start-up Timer (OST) counts the first 1024 cycles, independent of frequency.
  2. 2.To ensure these voltage tolerances, VDD and VSS must be capacitively decoupled as close to the device as possible. 0.1 μF and 0.01 μF values in parallel are recommended.