TMR0L

TMR0L

Timer0 Period/Count Low Register
  0x103 8  

TMR0L

Bit  7 6 5 4 3 2 1 0  
  TMR0L[7:0]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 0 0  

Bits 7:0 – TMR0L[7:0]: TMR0 Least Significant Counter

TMR0 Least Significant Counter

ValueNameDescription
0 to 255 MD16 = 0 8-bit Timer0 Counter bits
0 to 255 MD16 = 1 16-bit Timer0 Least Significant Byte