UxCON1
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
ON | WUE | RXBIMD | BRKOVR | SENDB | |||||
Access | R/W | R/W/HC | R/W | R/W | R/W/HC | ||||
Reset | 0 | 0 | 0 | 0 | 0 |
Serial Port Enable
Value | Description |
---|---|
1 | Serial port enabled |
0 | Serial port disabled (held in Reset) |
Wake-Up Enable
Value | Description |
---|---|
1 | Receiver is waiting for falling RX input edge which will set the UxIF bit. Cleared by hardware on wake-up event. Also requires the UxIE bit of PIEx to enable wake. |
0 | Receiver operates normally |
Receive Break Interrupt Mode Select
Value | Description |
---|---|
1 | Set RXBKIF immediately when RX in has been low for the minimum Break time |
0 | Set RXBKIF on rising RX input after RX in has been low for the minimum Break time |
Send Break Software Override
Value | Description |
---|---|
1 | TX output is forced to non-Idle state |
0 | TX output is driven by transmit shift register |
Send Break Control(1)
Value | Description |
---|---|
1 | Output Break upon UxTXB write. Written byte follows Break. Bit is cleared by hardware. |
0 | Break transmission completed or disabled |