Virtual Port Input

The input to the Virtual Port is selected using the PORTWINx registers. There is a separate PORTWINx register for each pin of the Virtual Port. Several core independent peripherals are available as input selections to the multiplexer as shown in the PORTWINx Input Selections table below. In addition to the core independent peripherals, the following inputs are also added to each multiplexer:

As previously mentioned, one of the input selections available to the PORTWINx register is the LATWn register bit. The LATW register allows the user to write a value to the Virtual Port from software. Unlike a typical I/O port, LATW is a separate register from the actual data register as shown in Figure 1 block diagram.
Important:
  1. 1.To perform a software write to one of the virtual pins using the LATW register, the PORTWINx register for that virtual pin must select the corresponding LATWn bit as input to the Virtual Port.
  2. 2.Reading the LATW register returns the most recently written value to the LATW register and not the actual input to the Virtual Port. The actual input to the Virtual Port is selected using PORTWINx register and can be read using the PORTW register. This is similar to the standard I/O pins read/write operations.

The following input selection multiplexers are available on this device:

Table 1. PORTWINx Input Selections
IN[3:0] PORTWIN0 PORTWIN1 PORTWIN2 PORTWIN3 PORTWIN4 PORTWIN5 PORTWIN6 PORTWIN7
111 CLC1_OUT CLC2_OUT CLC3_OUT CLC4_OUT CLC1_OUT CLC2_OUT CLC3_OUT CLC4_OUT
110 CCP1_OUT PWM1S1P1_OUT PWM2S1P1_OUT CCP1_OUT CCP2_OUT PWM1S1P2_OUT PWM2S1P2_OUT CCP2_OUT
101 SPI1_SS SPI1_SDO SPI1_SCK SPI1_SS SPI1_SDO SPI1_SCK SPI1_SDO SPI1_SCK
100 TU16A_OUT TU16B_OUT TMR2_OUT TMR4_OUT TU16A_OUT TU16B_OUT TMR2_OUT TMR4_OUT
011 CLKREF_OUT HLVD_OUT CLKREF_OUT HLVD_OUT CLKREF_OUT HLVD_OUT CLKREF_OUT HLVD_OUT
010 RC0 RC1 Reserved RC3 RC4 RC5 RC6(1) RC7(1)
001 RW1 RW2 RW3 RW4 RW5 RW6 RW7 RW0
000 LATW0 LATW1 LATW2 LATW3 LATW4 LATW5 LATW6 LATW7
Note:
  1. 1.20-pin devices only. Reserved on 14-pin devices.